pci support
This commit is contained in:
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113145e430
commit
c60b008e94
4
Makefile
4
Makefile
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@ -1,4 +1,4 @@
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CC = /home/rami/crossdev/bin/i686-elf-gcc
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CC = i686-elf-gcc
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AS = nasm
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BUILDDIR := build
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@ -19,7 +19,7 @@ ISO := Hazel.iso
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CFLAGS := -ffreestanding -Wall -Wextra -Werror -I $(INCLUDEDIR) -I lib
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LDFLAGS := -ffreestanding -nostdlib -lgcc -T kernel/kernel.ld
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QEMUFLAGS := -d int -cdrom $(BUILDDIR)/$(ISO) -s -m 512M -serial stdio
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QEMUFLAGS := -cdrom $(BUILDDIR)/$(ISO) -s -m 512M -serial stdio
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$(BUILDDIR)/$(KIMG): $(KOBJ) $(LOBJ)
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$(CC) $^ -o $@ $(LDFLAGS)
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BIN
boot/initrd
BIN
boot/initrd
Binary file not shown.
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@ -44,7 +44,7 @@ struct GenericAddressStructure
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uint64_t Address;
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};
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struct fadt {
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typedef struct {
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sdt_hdr_t hdr;
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uint32_t FirmwareCtrl;
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uint32_t Dsdt;
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@ -109,10 +109,10 @@ struct fadt {
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struct GenericAddressStructure X_PMTimerBlock;
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struct GenericAddressStructure X_GPE0Block;
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struct GenericAddressStructure X_GPE1Block;
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};
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} fadt_t;
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rsdp_t *acpi_find_rsdp();
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uint32_t acpi_checksum(void *s, int size);
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void *acpi_find_sdt(rsdt_t *rsdt, const char sig[6]);
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uint8_t acpi_checksum(void *s, int size);
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void *acpi_find_sdt(rsdt_t *rsdt, const char *sig);
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#endif
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@ -6,4 +6,10 @@
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uint8_t inb(uint16_t port);
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void outb(uint16_t port, uint8_t byte);
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uint16_t inw(uint16_t port);
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void outw(uint16_t port, uint16_t byte);
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uint32_t inl(uint16_t port);
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void outl(uint16_t port, uint32_t byte);
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#endif
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11
include/kernel/pci.h
Normal file
11
include/kernel/pci.h
Normal file
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@ -0,0 +1,11 @@
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#ifndef HAZEL_PCI_H_
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#define HAZEL_PCI_H_
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#include <stdint.h>
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#define PCI_CONFIG_ADDR 0xCF8
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#define PCI_CONFIG_DATA 0xCFC
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uint16_t pci_read_cfg(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
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#endif
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@ -16,24 +16,24 @@ rsdp_t *acpi_find_rsdp() {
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return 0;
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}
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uint32_t acpi_checksum(void *s, int size) {
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uint8_t acpi_checksum(void *s, int size) {
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uint32_t sum = 0;
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for (int i = 0; i < size; i++) {
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sum += ((uint8_t *)s)[i];
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}
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return sum;
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return (sum & 0xFF) == 0;
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}
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void *acpi_find_sdt(rsdt_t *rsdt, const char sig[6]) {
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void *acpi_find_sdt(rsdt_t *rsdt, const char *sig) {
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int entries = (rsdt->hdr.Length - sizeof(sdt_hdr_t)) / 4;
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for (int i = 0; i < entries; i++) {
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const char *ptr = (const char *)rsdt->other_tables[i];
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int j = 0;
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for (; j < RSDP_SIG_LEN; j++)
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for (; j < 4; j++)
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if (ptr[j] != sig[j]) break;
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if (j == RSDP_SIG_LEN) return (void *)ptr;
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if (j == 4) return (void *)ptr;
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}
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return 0;
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32
kernel/io.c
32
kernel/io.c
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@ -15,3 +15,35 @@ void outb(uint16_t port, uint8_t byte) {
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: // no output
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: "a" (byte), "d" (port));
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}
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uint16_t inw(uint16_t port) {
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uint16_t result;
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asm volatile ("in %%dx, %%ax"
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: "=a" (result)
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: "d" (port));
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return result;
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}
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void outw(uint16_t port, uint16_t byte) {
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asm volatile ("out %%ax, %%dx"
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: // no output
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: "a" (byte), "d" (port));
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}
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uint32_t inl(uint16_t port) {
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uint32_t result;
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asm volatile ("in %%dx, %%eax"
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: "=a" (result)
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: "d" (port));
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return result;
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}
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void outl(uint16_t port, uint32_t byte) {
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asm volatile ("out %%eax, %%dx"
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: // no output
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: "a" (byte), "d" (port));
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}
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@ -9,6 +9,7 @@
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#include <kernel/task.h>
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#include <kernel/ps2.h>
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#include <kernel/acpi.h>
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#include <kernel/pci.h>
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#include <stdint.h>
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kernel_ctx_t ctx = {0};
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@ -126,16 +127,33 @@ void kernel(multiboot_info_t *info) {
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rsdp_t *rsdp = acpi_find_rsdp();
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if (!rsdp) goto halt;
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if ((acpi_checksum(rsdp, sizeof(rsdp_t)) & 0xFF) != 0) goto halt;
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LOG("RSDP found\n");
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if (!acpi_checksum(rsdp, sizeof(rsdp_t))) goto halt;
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if (rsdp->Revision == 0) LOG("Using ACPI version 1.0\n")
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else if (rsdp->Revision == 2) {
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LOG("ACPI versions higher than 1.0 are not currently supported!\n");
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goto halt;
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}
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rsdt_t *rsdt = (rsdt_t *)(rsdp->RsdtAddress);
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if (!rsdt) goto halt;
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LOG("%08X\n", acpi_checksum(rsdt, rsdt->hdr.Length));
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if (acpi_checksum(rsdt, sizeof(rsdt_t)) != 0) goto halt;
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if (!acpi_checksum(rsdt, rsdt->hdr.Length)) goto halt;
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LOG("RSDT is valid\n");
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// for (;;) {}
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void *mcfg = acpi_find_sdt(rsdt, "MCFG");
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if (!mcfg) LOG("PCIe not supported\n");
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for (int i = 0; i < 256; i++) {
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for (int j = 0; j < 32; j++) {
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for (int k = 0; k < 8; k++) {
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uint16_t w = pci_read_cfg(i, j, k, 0xA);
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uint8_t class = (uint8_t)(w >> 8);
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uint8_t subclass = (uint8_t)w;
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if (class == 0xFF) continue;
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LOG("Class: %04X | Subclass: %04X\n", class, subclass);
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}
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}
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}
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pic_remap(PIC_1_START, PIC_2_START);
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ps2_init();
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19
kernel/pci.c
Normal file
19
kernel/pci.c
Normal file
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#include <kernel/pci.h>
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#include <kernel/io.h>
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uint16_t pci_read_cfg(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
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uint32_t address;
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uint32_t lbus = (uint32_t)bus;
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uint32_t lslot = (uint32_t)slot;
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uint32_t lfunc = (uint32_t)func;
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uint16_t tmp = 0;
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// Create configuration address as per Figure 1
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address = (uint32_t)((lbus << 16) | (lslot << 11) |
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(lfunc << 8) | (offset & 0xFC) | ((uint32_t)0x80000000));
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outl(PCI_CONFIG_ADDR, address);
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tmp = (uint16_t)((inl(PCI_CONFIG_DATA) >> ((offset & 2) * 8)) & 0xFFFF);
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return tmp;
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}
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